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MC33170 RF Amplifier Companion Chip for Dual-Band Cellular Subscriber Terminal
The MC33170 is a complete solution for drain modulated dual-band GSM 900MHz and DCS-1800MHz Power Amplifiers. Thanks to its internal decoder, the MC33170 drastically simplifies the interface between the PAs and the baseband logic section, providing an immediate gain in part count but also in occupied copper area. The device is also ready for 1V platforms since it accepts logic high control signals down to 900mV@25C. A priority management system ensures the negative is present before authorizing the power modulation, giving the necessary ruggedness to the final design. This function can easily be disabled for PAs not requiring a negative bias. The device is able to directly drive an external P or N-channel with the possibility to linearize the overall response via the internal high-performance control amplifier and easily implement system gain. Finally, an LDO delivers a stable voltage, usable for external biasing purposes.
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1
TSSOP-14 DTB SUFFIX CASE 948G
PIN CONNECTIONS
Band Selection Tx Enable GSM-900 1 2 3 14 Common Enable
13 Negative Regulator 12 Out 11 Vboost 10 INV 9 8 NINV LDO
DCS-1800 4 PA Start-up Gnd Vbat 5 6 7
* 1V platform compatible: ON voltage = 900mV, OFF voltage = * * * * *
300mV max Priority management system prevents power modulation before negative bias establishes High performance 4.5MHz gain-bandwidth product operational amplifier Drives N or P-channel MOSFET 2.5V low-noise LDO Idle mode input for very low power consumption (standby mode)
(Top View) ORDERING INFORMATION
Device MC33170DTB Package TSSOP-14 Shipping 96 Units / Rail
MC33170DTBR2 TSSOP-14 2500 / Tape & Reel NINV 9 Shutdown 2.5 V Low Dropout 2.5 V Vbat Vboost Vbat (5.5 V Max) 11 7
Shutdown LDO Output Common Enable TX Enable Band Selection 2.5 V 8 + 14 2 1 Open-Collector BG Decoder BD BG 3 GSM-900 4 1 mA Continuous 700 mA Peak 50 mA Continuous Clip to -5 V 13 10 6 12 Out -
NEGOK? 5
DCS-1800
PA Start-Up
Negative INV Regulator
(c) Semiconductor Components Industries, LLC, 2001
1
May, 2001 - Rev. 1
Publication Order Number: MC33170/D
MC33170
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PIN DESCRIPTION
Pin No. 1 2 3 4 5 6 7 8 9 Pin Name Function Description Band Selection Tx Enable Selects the transmit band Starts the power A level high on this input selects the DCS chain. A zero selects the GSM chain. A level high on this pin enables the DCS/GSM chain and establishes a low-resistance link between pin 5 and 7 GSM-900 Biases the 900MHz section Biases the 1.8GHz section When pin 1 is at zero and pin 2 goes high, the LDO voltage appears on this pin (pin 14 is high) When pin 1 is at one and pin 2 goes high, the LDO voltage appears on this pin (pin 14 is high) When pin 2 goes high, the battery voltage appears on this pin with a 700mA peak current capability (pin 14 is high) The IC ground DCS-1800 PA Start-up Gnd Enables the PA power section The IC ground Vbat The IC power supply This pin is wired to the battery terminal. A 100nF decoupling capacitor is recommended, depending on the supply impedance This output requires a 100nF decoupling and is able to deliver up to 10mA continuous The non-inverting OPAMP input The inverting OPAMP input LDO Low DropOut regulator Positive OPAMP input NINV INV 10 11 Negative OPAMP input Vboost Out Boost voltage from the PA The OPAMP output This pin connects to a boost voltage delivered by the RF PA. This boost is necessary when driving an N-channel The output of the OPAMP/MOSFET driver pin 12 13 Negative Reg. The PA negative clip This pin clips the PA negative bias to --5V and prevents/authorizes the modulation depending on its typical level : <5.5V --- 2.5V> OK <1.3V --- -3.5V> NOTOK <-4.2V --- -5V> OK Max. clipping current is 5mA When high, this pin puts the IC in on-mode 14 Common Enable Enables the whole IC
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MAXIMUM RATINGS
Storage Temperature Range Operating Ambient Temperature Maximum Junction Temperature Maximum Operating Junction Temperature Maximum power dissipation NW suffix, plastic package @Tj=25C NW suffix, plastic package @Tj=85C Thermal resistance Junction-to-Air Steering Switch, continuous output current Steering Switch, continuous output current Steering Switch, peak output current < 1s ESD capability, Machine model ESD capability, HBM model Common Enable Negative regulation pin Boost voltage INV NINV Vbat PA Start-up DCS-1800 GSM-900 Tx Enable Band selection Rating
Note1: The control pins, CE, TxEn and Bands shall never exceed Vcc + 0.3V Note2: A 100nF decoupling capacitor is recommended between the IC Vcc and ground Note3: To avoid any damage to the IC, the following sequence must be secured: CE goes up then Tx goes up ----> modulation startup TX goes down then CE goes down ----> modulation stop
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MC33170
Pin No.
All pins
All pins
3-4 5 5
14
13
10
11
9
7
5
4
3
2
1
3 GSM/DCS PA startup PA startup Vstartup Symbol Vboost VGSM Vband VDCS TA Tjmax Tj PD PD RJ-A TxEn Vbat CE VZ V+ V- TSTG Value MIN -5.4 -5 -5 0 0 0 0 0 0 0 0 -60 to +150 -40 to +85 150 125 Value MAX 1 50 700 500 200 200 200 5.5 5.5 5.5 5.5 5.5 5.5 5.5 5.5 5.5 5.5 12 2 Units mW mW C/W mA mA mA kV C C C C V V V V V V V V V V V V
MC33170
ELECTRICAL CHARACTERISTICS
Characteristic Pin # Symbol Min Typ Max Unit
INPUT SPECIFICATIONS
(For typical values TA = 25C, for min/max values TA = -40C to +85C, Max TJ = 125C unless otherwise noted) Input voltage range Quiescent Current (ON mode) 1 band operating, no load, Vneg. Reg.= -4.2V, VCE = 900mV Standby current (OFF mode) CE pin at low level, Vbat = 5.5V, VNEG and Vboost open 7 Vbat IQON IQOFF 2.7 3.6 1.0 1.0 5.5 3.0 10 V mA A
LOGIC CONTROL SPECIFICATIONS Logic Levels (For typical values TA = 25C, for min/max values TA = -40C to +85C, Max TJ = 125C unless otherwise noted)
Logic Level zero Band Selection, Common Enable, TxEn Logic Level one Band Selection, Common Enable, TxEn 1-2 14 1-2 14 OFF ON 900 300 mV mV
Timings (TA = 25C)
Transmission Enable, device already ON 10% of TxEn to 90% of Vbat on PA start-up pin 4.0 s
VOLTAGE REGULATOR SPECIFICATIONS Option section (For typical values TA = 25C, for min/max values TA = -40C to +85C, Max TJ = 125C unless otherwise noted)
Output voltage Output current Short circuit current (Vout = Vnominal - 300mV) Line regulation Vin = Vout + 1V to 5.5V, device is ON 10mA load on pin 8, 100nF Dropout voltage at Iout = 10mA Output capacitor 8 8 8 7-8 8 8 VregDROP CregOUT VregOUT IregOUT IregSHORT 20 400 150 100 2.45 2.5 2.55 10 V mA mA V mV nF
Dynamic parameters (TA = 25C)
Ripple rejection F = 1kHz, Vin = Vout + 1V, Iout = 1mA, Cout = 100nF RMS Noise voltage Iout = 1mA, Cout = 100nF, <20Hz -- 200kHz> Noise density @ 1kHz Iout = 1mA, Cout = 100nF Rise time : 10% of CE to 90% of VregOUT 8 8 8 14-8 en PSRR -70 100 330 5.0 dB V nV/Hz s
CONTROL AMPLIFIER SPECIFICATIONS
(For typical values TA = 25C, for min/max values TA = -40C to +85C, Max TJ = 125C unless otherwise noted) Continuous current Peak current (sink and source) Quiescent current entering pin 11 at 8V Device is in ON state and no load on pin 12 Input bias current, V+ = V- = 2V Open-loop voltage gain, TA = 25C Gain Bandwidth Product measured at 100kHz Output voltage levels, Vnegreg=-5V Level high : Isource = 1mA Level low : Isink = 1mA Input offset voltage 12 VOH VOL 9-10 7.75 0.25 10 mV 12 12 12 ICONT IPEAK IQON IIB AVOL GBW 1.0 600 60 5.5 2.0 10 mA mA mA nA dB MHz V
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MC33170
Characteristic Pin # Symbol Min Typ Max Unit
PROTECTION AND STABILIZATION CIRCUIT
(For typical values TA = 25C, for min/max values TA = -40C to +85C, Max TJ = 125C unless otherwise noted) Negative bias present No Negative protection disabled Regulation level Sink current 12 12 12 12 2.5 -5.4 -5.0 -4.6 5.0 -4.2 V V V MA
STEERING SWITCHES, SERIES RESISTANCE
(For typical values TA = 25C, for min/max values TA = -40C to +85C, Max TJ = 125C unless otherwise noted) GSM-900 @ Id = 1mA, Vbat = 5.5V DCS-1800 @ Id = 1mA, Vbat = 5.5V Power Amplifier Startup @ Id = 50mA, Vbat = 5.5V 3 4 5 60 60 1.0 160 160 2.0 W W W
Lack of negative circuitry behavior: The MC33170 hosts a circuitry that prevents the power modulation startup if the negative bias is not established. However, to accommodate with PAs that do make use of a Vpin 13
negative bias, it is possible to connect pin 13 to pin 7 and thus invalidate the protection circuitry. The below sketch details the available levels to fulfil this function
OK NOT OK OK
MC33170 operating truth table, pin levels:
TxEN X 0 1 1 Band Selection X X 0 1 Common Enable 0 1 1 1 GSM-900 DCS-1800
2.5V 0V
-4.2V -5V
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PA startup High-impedance High-impedance High-impedance High-impedance High-impedance High-impedance High-impedance VLDO-Io.RDS(ON) High-impedance VBAT-Io.RDS(ON) VBAT-Io.RDS(ON) VLDO-Io.RDS(ON)
Io is the current delivered by the considered pin, RDS(ON) is the switch series resistance as defined in the section Steering Switches
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MC33170
TYPICAL OPERATING CHARACTERISTICS
900 800 700 LOGIC LEVEL (mV) 600 500 400 300 200 100 0 -40 -20 0 20 40 60 80 100 120 140 CE BAND TxEn 2.502 2.500 2.498 Vout (V) 2.496 2.494 2.492 2.490 2.488 -50 0 50 TEMPERATURE (C) 100 150 ILDOout = 10mA ILDOout = 5mA
TEMPERATURE (C)
Figure 1. TxEn, BAND, CE Logic Level with Temperature
Figure 2. LDO Voltage Output Variation with Temperature
140 120 100 Dropout = 10mA
2.55 LDO OUTPUT VOLTAGE (V) 2.53 2.51 2.49 2.47 2.45 DROPOUT (mV)
80 60 40 20 Dropout = 1mA Dropout = 5mA
VLDOout @ Vbat = 3.6V, 25C
0
2
4
6
8 ILDOout (mA)
10
12
14
16
0 -40
-20
0
20
40
60
80
100
120
140
TEMPERATURE (C)
Figure 3. LDO Output Voltage versus LDO Output Current @ 25C
1600 1400 QUIESCENT CURRENT (nA) 1200 1000 800 600 400 200 0 -40 -20 0 20 40 60 80 100 120 140
Figure 4. LDO Dropout versus ILDOout Current @ 25C
3.0 2.0 1.0 THRESHOLD (V) 0 -1.0 -2.0 -3.0 -4.0 -5.0 -40 -20 0 20 40 60 80 100 120 140 Positive Neg-Reg Threshold Negative Neg-Reg Threshold
TEMPERATURE (C)
TEMPERATURE (C)
Figure 5. Quiescent Current versus Temperature
Figure 6. Neg-Reg Thresholds versus Temperature
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MC33170
TYPICAL OPERATING CHARACTERISTICS (cont.)
-4.25 NEG-REG CLAMP VOLTAGE (V) -4.35 -4.45 -4.55 -4.65 -4.75 -4.85 -4.95 -5.05 -5.15 -5.25 0 2 4 6 8 10 NEG-REG CLAMP (V) -4.94 -4.96 -4.98 -5.00 -5.02 -5.04 -5.06 -5.08 -5.10 -5.12 -5.14 -40 -20 0 20 40 60 80 100 120 140 NegReg Clamp @ 3mA
INEG-REG (mA)
TEMPERATURE (C)
Figure 7. Clamp Voltage vs INeg-Reg Current @ 25C
140 120 TRANSMISSION TIME (ns) 100 80 60 40 20 0 -40 10 60 TEMPERATURE (C) 110 160 TxEn 5.5V TxEn 0.9V
Figure 8. NegReg Clamp @ 3mA versus Temperature
4.54 4.52 4.50 RISE TIME ( s) 4.48 4.46 4.44 4.42 4.40 2 4 6 8 ILDOout (mA) 10 12 14
Figure 9. Transmission Enable Propagation Delay versus Temperature
Figure 10. LDO Rise Time versus Load @ 25C
600 500 GROUND CURRENT ( A) NVdson (mV) 400 300 200 100 0 -40 10 60 TEMPERATURE (C) 110 160
500 450 400 350 300 250 200 150 100 50 0 -40 -20 0 20 40 60 80 I load=300mA 100 120 140 TEMPERATURE (C) I load=100mA I load=50mA
Figure 11. Ground Current versus Temperature
Figure 12. PA Start up Vdson @ Vbat 3.6V
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MC33170
CHARACTERIZATION CURVES
Iout, 5mA/div
Vout, 10mV/div
TA = 25C Vout = 2.5V
X = 50ms/div
LDO's output when banged from 0 to 10mA
Audio susceptibility measurement fixture Measurement conditions: Tx = CE = 1.0V, Vcc = 3.6V, NegOut = Vcc, Cbyp = 100nF
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MC33170
0 -10 -20 -30 dB -40 -50 -60 -70 -80 -90 -50 0 10mA 1mA 50 FREQUENCY (Hz) 100 150
Input voltage rejection at Iout = 1mA and 10mA Input audio susceptibility at Iout = 1mA/10mA
Gain/phase measurement fixture
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MC33170
180 135 90 45 Phase 0 -45 -90 -135 -180 10000 100000 1000000 FREQUENCY (Hz) 10000000 Phase Cout = 0 Gain 50 40 30 20 0 -10 -20 -30 -40 -50 100000000 Gain (dB) 10
Operational amplifier AC measurements with: Vcc = 3.6V, Tx = CE = 1.0V, Vboost = 8V, Pin 12 loaded not loaded
MC33170 Bode plot
200 150 100 50 Phase 0 -50 -100 -150 -200 10000 100000 1000000 FREQUENCY (Hz) 10000000 Phase Cout = 1nF Gain
50 40 30 20 Gain (dB) 10 0 -10 -20 -30 -40 -50 100000000
Operational amplifier AC measurements with: Vcc = 3.6V, Tx = CE = 1.0V, Vboost = 8V, Pin 12 loaded by 1nF
MC33170 Bode plot
450 400 350 nV/sqrt Hz 300 250 200 150 100 50 0 100 1000 10000 FREQUENCY (Hz) 100000 1000000
LDO output noise measurement with: Vcc = 3.6V, Tx = CE = 1.0V, Cout = 100nF, Iout = 1mA Integrated noise: 20Hz - 200kHz = 100Vrms 20Hz - 1MHz = 170Vrms
Spectral noise density at Iout = 1mA
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MC33170
MC33170 application hints The MC33170 represents a major leap toward miniaturization and compactness of Power Amplifiers (PAs) systems. Prior to talk about the 33170 application circuits, let us review how a classical dual-band transmission chain is implemented. At the beginning of the chain, the power ramping signal is delivered by the Baseband's Digital to Analog Converter (DAC). Because of the digitization, a natural discontinuity appears between the various steps the signal is made of. As a matter of fact, this sharp transitions create undesirable effects and need to be smoothed by an external circuitry (figure 13).
DAC staircase
Filter action
Figure 13. DAC's signal can be smoothed by an appropriate circuitry
The filtering action can be implemented in a various way, but usually a 3rd order Bessel filter represents a good choice. Actual solutions require the use of an external operational amplifier (OPAMP) dedicated to this function. For drain-controlled PAs, the power is directly dependent upon the supply delivered to the device. Several methods exist but the preferred one stays the N or P channel modulation. In this application, the N-channel is wired in a source-follower configuration and therefore needs an external voltage to ensure its adequate enhancement. This upper voltage can be obtained from a step-up converter or directly from ON Semiconductor PAs, as with the MRFIC0919 or MRFIC1819. To quickly charge/discharge the MOSFET Ciss capacitor, a dedicated driver is needed, with a voltage swing high enough to bias the N-channel toward its specified RDSON. Radio-Frequency PAs need stable bias levels to keep their operating point at the right place, despite supply variations. A Low DropOut (LDO) regulator is the obvious choice for
this purpose. Unfortunately, to keep the quiescent power at its minimum during the GSM/DCS time-frame pauses (e.g. no power delivered), it is important to quickly remove the bias from the PAs. Conversely, the LDO shall be fast enough to bias the PAs at anytime, without hampering the overall response time. Such a task is difficult for an off-the-shelf regulator: a specific component has to be found. Thanks to their innovative designs, ON Semiconductor PAs, such as the aforementioned ones, do not require any external negative sources. However, some synchronization signals are needed to activate the internal circuitry and provide them with a stable operating point. This is usually done by using external low/high power switches. Finally, a safety system needs to be implemented to prevent the modulation start in case the negative bias is not established. Gathering all these information onto a final drawing gives birth to figure 14.
Vboost
Digital Analog Converter LDO for Bias Point
Active 3rd Order BESSEL Filter
MOSFET Driver Level Translation Vbat
Power Module
Shutdown Shutdown 900 MHz 1.8 GHz TX Negative Present? Dual RF PA
Figure 14. Actual solution to drive a two-PA configuration
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MC33170
MC33170 as a Bessel filter Thanks to its package, the MC33170 simplifies the implementation of any filtering/driving configuration, e.g. with either an N or P-channel MOSFET. Figure 15a details the way to wire a 100kHz filter while driving an N-channel MOSFET. In this application, a third order filter is achieved by combining a first pole passive RC-filter, followed by a second-order Sallen-Key complex pole-pair section.
Vboost Vbattery
Input 1k 19.88 k 108.4 k
33 pF 9 10
11 + 6
MC33170 OPAMP Section 12 MTSF3N02HD
680 pF
22 pF 10 pF
100 k 100 k
To Power Amplifier's Drain
Figure 15a. Using the MC33170's OPAMP to filter out the DAC discontinuities
As one can see, it is easy to select the desired gain value via the 100k feedback resistors and accordingly tailor it to the DAC output level. Figure 15a performs the filtering function but also delivers the adequate sink/source current to drive the MOSFET transistor. The two-component section of figure 2 is reduced into a single one, saving cost and PCB area. It also important to point out that the OPAMP section can be totally disabled by the Common Enable pin. Benefits of the closed loop configuration One of the MC33170's key applications is to make the modulation section operating in a closed-loop configuration. That is to say, the power chain is closed
through the feedback resistor (the 100kW network in figure 3) and forces the output to follow the input ramp. With N-channels, it brings several benefits: 1. The input ramp does no longer deals with the MOSFET threshold voltage which can introduce a certain amount of delay in the response time. 2. At low powers, the distributions between the RDS(ON) is automatically compensated. With P-channels, the application does not need an elevated voltage to ensure the channel enhancement but maximizes the presence of the OPAMP to ensure a fully linear chain.
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MC33170
1: input ramp 1: input ramp 2: output voltage Rload = 220nF//5W 2: output voltage Rload = 220nF//5W
Figure 15b. Going down with the 100kHz filter
Figure 15c. Going up with the 100kHz filter
The need of a fast regulator Since the internal LDO controls the PA's bias points, it is important to quickly drive the regulator in order to ensure the minimum consumption during the non-modulation phases. A standard LDO has difficulties to react in less than 30s.
This delay would be unacceptable in a system operating with fast frames. The MC33170 internal LDO has be designed to react within less than 10s, ensuring a prompt bias establishment. Figure 16 shows the way the bias voltage takes place, without any overshoot.
1: Common Enable 2: LDO output Rload = 220nF//1kW Shot with 5s per division
Figure 16. A fast LDO ensures an immediate bias availability
The LDO requires a standard 100nF decoupling capacitor to keep its output stable. The typical output noise stays within 100V from 100Hz to 100kHz. High and low current switches The MC33170 hosts two types of steering switch. The first one only deals with low currents since it delivers the
operating bias voltage to the PAs. With two distinct switches, the MC33170 low-current switches control the RF PA GSM 900MHz or DCS 1.8GHz. Once again, the reaction time of these elements is optimized to ensure a fast operation. Figure 17a depicts the typical signal variations. Please note that the Tx pin is controlled via a logic 0 1 of 1V ensuring the compatibility with 1V platforms.
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MC33170
1: Tx Enable 2: Start-up in
1: Tx Enable 2: GSM/DCS control pin
Start-up current 68W//220nF 500mA/div
Figure 17a. Typical GSM/DCS pins response time
Figure 17b. Peak current capability of the power switch
Complete dual-band application Figure 18 shows how implementing the MC33170 in a complete dual-band application where a 100kHz filter is combined with the MOSFET driver.
+ Battery
Modulation Ramp Chip Enable Band Selection TX Enable
1 2 3 4 5 6 7
R8 1k
R9 19.88 k
C6 680 pF CE 14 Band TxEn Neg. Reg 13 GSM DCS PA Start GND Vbat Out 12 Vboost 11 INV 10 NINV 9 LDO 8 C5 100 nF C7 22 pF C9 10 pF
R10 108 k M2 MTSF3N02HD
C8 33 pF
R7 100 k R6 100 k
MC33170
GSM
DCS
Start
Zener
Vboost
Power
Figure 18. A complete dual-band application with the MC33170
Application The MC33170 has been designed to fulfill the requirements of the new ON Semiconductor dual-band RF amplifier, the MRFIC1859. For demonstration purposes, the
device was driven by the MC33170 in a simple gain two configuration. The below picture shows how the power signal drives the PA's drain.
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MC33170
Gate Signal
Control Signal
Figure 19. The driving signal delivered by the MC33170 allows fully linear power modulation
GSM specifications In order to meet the GSM specifications, the modulation edges must be smoothed to fit into the spectral template. This can be accomplished by implementing figure 18's
Bessel filter and adjusting the cutoff frequency. Once the edges are smoothed, the complete systems nicely fits into the GSM template, as depicted by figure 20.
Figure 20. Thanks to its flexibility, the MC33170 helps reaching the GSM specs
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MC33170
PACKAGE DIMENSIONS
TSSOP-14 DTB SUFFIX PLASTIC PACKAGE CASE 948G-01 ISSUE O
14X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
N
2X
L/2
14
8
0.25 (0.010) M
L
PIN 1 IDENT. 1 7
B -U-
N F DETAIL E K K1 J J1
0.15 (0.006) T U
S
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
A -V-
SECTION N-N -W-
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
DETAIL E
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MC33170/D

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